It is well known that in a conventional power device, the reverse voltage applied across an n+-region and a p+-region is sustained by a lightly doped thick semiconductor layer. Such a layer is called hereafter voltage-sustaining layer (VSL). As for a high-voltage power device, the specific on-resistance Ron (or the on-voltage) is also mainly determined by the voltage-sustaining layer, called as drift region in most cases. The lighter the doping of this layer is, and/or the thicker this layer is, the higher the breakdown voltage VB is, however, and the higher the on-resistance (or on-voltage) also is. In many power devices, one of the most important problems is to obtain both high breakdown voltage and low on-resistance. The relation between Ron and VB is an obstruction to make high performance power devices. Moreover, the above-mentioned Ron refers to the resistance per unit area of the conduction region in the voltage-sustaining layer, whereas actually, there are always some non-conduction regions in the voltage-sustaining layer. For instance, the region under the source-body region of a vertical-type (longitudinal-type) MOSFET and the region under the base electrode contact region of a bipolar transistor are both non-conduction regions.
The above problem was solved by the inventor (Chinese Patent No. ZL91101845.X, U.S. Pat. No. 5,216,275). The solution thereof is to utilize a composite buffer layer (or charge balance layer, shortly as CB-layer) between a p+-region and an n+-region to sustain voltage. The CB-layer contains two kinds of regions with opposite conduction type. These two kinds of regions are alternately arranged, as viewed from any cross-section parallel to the interface between the CB-layer and the n+ (or p+) region, whereas the previous VSL is always a semiconductor of single conduction type. The invention also discloses the MOST composed by the VSL. The on-resistance per unit area Ron is proportional to VB1.3. This represents a breakthrough to the conventional relation of VSL; meanwhile the other electrical performances of the MOST remain almost same.
Within the past few years, a significant change has taken place in the semiconductor power device industry. Through the use of structure of Super-Junction devices (i.e., structure of CB layer), COOLMOSTs have been capable of providing high voltage and high current.
FIGS. 1(a) and 1(b) illustrate a method of manufacturing a Super-Junction power device 1. The process begins with a semiconductor piece of a substrate 2 growing a first epitaxial layer 3. In the figures, the substrate 2 is a heavily doped n+ layer and the first epitaxial layer 3 is a lightly doped n layer. Ion implantation is performed to make a layer of p-type region 4 on layer 3. In general, an epitaxial layer is required for each 50 to 100 volts of sustaining voltage. Accordingly, as for a 600 volts transistor, it is required to sequentially deposit respective n-type epitaxial layers indicated by 5, 7, 9, 11 and 13 in FIG. 1(a). After each epitaxial layer is completed, it is required to make respective p-type ion implantation layer indicated by 4, 6, 8, 10, 12 and 14 in FIG. 1(a).
After the diffusion of p-type ion implantation layer 4, 6, 8, 10, 12 and 14, the p-region 16 is formed, and the region without influence of ion implantation is n-region 15 shown in FIG. 1(b). Thus the p-region and n-region with an arrangement are formed. The device layer, which is called device feature layer 17, is then performed. The device feature layer 17 includes n+ source region 18 formed by ion implantation, oxidation layer 19, and metal gate or polysilicon gate 20 thereon. There is a p+ region 21 between the two n+ source regions 18, below which there is a deep junction p+ region 22. The deep junction p+ region 22 connects to the p+ region 21.
Obviously, the above-mentioned manufacture method uses many times of epitaxy and it is very costly. Moreover, the CB-layer structure uses the principle of charge compensation, wherein the dose of dopants of p-regions and n-regions must be controlled precisely and this leads to increase of difficulty in manufacturing and increase of the cost of devices.
Another deficiency of the MOST with CB-layer structure is that, when the conduction current is very large, the electric charge of the carriers themselves affects the balance of the electric charge, which leads to a decrease of breakdown voltage with increasing of the current, i.e., a secondary breakdown phenomena. The safe-operating area (SOA) is therefore not very ideal.
Still another deficiency of the MOST with CB-layer structure is introduced by the two voltages existing between p-region and n-region, one of which is the built-in voltage, and the other is additional voltage produced by the on-resistance in a region when a current flows in the region. A depletion region existed between the two regions is caused by the two voltages, so that the area of effective section of the conduction region decreases. In other words, the on-resistance increases with the increasing of the current.